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42 relations: Advanced Micro Devices, Advanced Vector Extensions, AES instruction set, AMD Accelerated Processing Unit, AMD Turbo Core, Bit Manipulation Instruction Sets, Bobcat (microarchitecture), Bulldozer (microarchitecture), Cache prefetching, CLMUL instruction set, CPU cache, F16C, Floating-point unit, Hot Chips, Instructions per cycle, International Solid-State Circuits Conference, List of AMD chipsets, Load–store unit, Memory controller, Microsoft, MMX (instruction set), Out-of-order execution, PlayStation 4, Puma (microarchitecture), Render output unit, Socket AM1, Socket FT3, Speculative execution, SSE2, SSE3, SSE4, SSSE3, Streaming SIMD Extensions, Superscalar processor, System on a chip, Texture mapping unit, Unified shader model, United States dollar, Video Coding Engine, X86 virtualization, X86-64, Xbox One.
Advanced Micro Devices
Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets.
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Advanced Vector Extensions
Advanced Vector Extensions (AVX, also known as Sandy Bridge New Extensions) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge processor shipping in Q1 2011 and later on by AMD with the Bulldozer processor shipping in Q3 2011.
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AES instruction set
Advanced Encryption Standard instruction set (or the Intel Advanced Encryption Standard New Instructions; AES-NI) is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008.
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AMD Accelerated Processing Unit
The AMD Accelerated Processing Unit (APU), formerly known as Fusion, is the marketing term for a series of 64-bit microprocessors from Advanced Micro Devices (AMD), designed to act as a central processing unit (CPU) and graphics accelerator unit (GPU) on a single die.
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AMD Turbo Core
AMD Turbo Core is a technology implemented by AMD that allows the processor to dynamically adjust and control the processor operating frequency in certain versions of its processors which allows for increased performance when needed while maintaining lower power and thermal parameters during normal operation.
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Bit Manipulation Instruction Sets
Bit Manipulation Instructions Sets (BMI sets) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD.
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Bobcat (microarchitecture)
The AMD Bobcat Family 14h is a microarchitecture created by AMD for its AMD APUs, aimed at a low-power/low-cost market.
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Bulldozer (microarchitecture)
The AMD Bulldozer Family 15h is a microprocessor microarchitecture for the FX and Opteron line of processors, developed by AMD for the desktop and server markets.
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Cache prefetching
Cache prefetching is a technique used by computer processors to boost execution performance by fetching instructions or data from their original storage in slower memory to a faster local memory before it is actually needed (hence the term 'prefetch').
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CLMUL instruction set
Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010.
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CPU cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory.
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F16C
The F16C (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting between half-precision and standard IEEE single-precision floating-point formats.
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Floating-point unit
A floating-point unit (FPU, colloquially a math coprocessor) is a part of a computer system specially designed to carry out operations on floating point numbers.
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Hot Chips
Hot Chips is technological symposium held every year in August in Silicon Valley.
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Instructions per cycle
In computer architecture, instructions per cycle (IPC) is one aspect of a processor's performance: the average number of instructions executed for each clock cycle.
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International Solid-State Circuits Conference
International Solid-State Circuits Conference is a global forum for presentation of advances in solid-state circuits and Systems-on-a-Chip.
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List of AMD chipsets
This is an overview of chipsets sold under the brand AMD, manufactured before May 2004 by the company itself, before the adoption of open platform approach as well as chipsets manufactured by ATI Technologies (ATI) after July 2006 as the completion of the ATI acquisition.
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Load–store unit
In computer engineering a load–store unit is a specialized execution unit responsible for executing all load and store instructions, generating virtual addresses of load and store operations and loading data from memory or storing it back to memory from registers.
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Memory controller
The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory.
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Microsoft
Microsoft Corporation (abbreviated as MS) is an American multinational technology company with headquarters in Redmond, Washington.
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MMX (instruction set)
MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1997 with its P5-based Pentium line of microprocessors, designated as "Pentium with MMX Technology".
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Out-of-order execution
In computer engineering, out-of-order execution (or more formally dynamic execution) is a paradigm used in most high-performance central processing units to make use of instruction cycles that would otherwise be wasted.
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PlayStation 4
The PlayStation 4 (PS4) is an eighth-generation home video game console developed by Sony Interactive Entertainment.
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Puma (microarchitecture)
The Puma Family 16h is a low-power microarchitecture by AMD for its APUs.
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Render output unit
The render output unit, often abbreviated as "ROP", and sometimes called (perhaps more properly) raster operations pipeline, is a hardware component in modern graphics processing units (GPUs) and one of the final steps in the rendering process of modern graphics cards.
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Socket AM1
The Socket FS1b was branded Socket AM1, is a socket designed by AMD, launched in April 2014 for desktop SoCs in the value segment.
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Socket FT3
AMD's Socket FT3 or BGA-769 targets mobile devices and was designed for APUs codenamed Kabini and Temash, Beema and Mullins (Socket FT3b).
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Speculative execution
Speculative execution is an optimization technique where a computer system performs some task that may not be needed.
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SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000.
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SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture.
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SSE4
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L).
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SSSE3
Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.
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Streaming SIMD Extensions
In computing, Streaming SIMD Extensions (SSE) is an SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of processors shortly after the appearance of AMD's 3DNow!.
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Superscalar processor
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor.
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System on a chip
A system on a chip or system on chip (SoC) is an integrated circuit (also known as an "IC" or "chip") that integrates all components of a computer or other electronic systems.
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Texture mapping unit
A texture mapping unit (TMU) is a component in modern graphics processing units (GPUs).
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Unified shader model
In the field of 3D computer graphics, the Unified Shader Model (known in Direct3D 10 as "Shader Model 4.0") refers to a form of shader hardware in a graphical processing unit (GPU) where all of the shader stages in the rendering pipeline (geometry, vertex, pixel, etc.) have the same capabilities.
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United States dollar
The United States dollar (sign: $; code: USD; also abbreviated US$ and referred to as the dollar, U.S. dollar, or American dollar) is the official currency of the United States and its insular territories per the United States Constitution since 1792.
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Video Coding Engine
Video Coding Engine (VCE, sometimes incorrectly referred to as Video Codec Engine) is AMD's video encoding ASIC implementing the video codec H.264/MPEG-4 AVC.
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X86 virtualization
In computing, x86 virtualization refers to hardware virtualization for the x86 architecture.
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X86-64
x86-64 (also known as x64, x86_64, AMD64 and Intel 64) is the 64-bit version of the x86 instruction set.
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Xbox One
Xbox One is a line of eighth generation home video game consoles developed by Microsoft.
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References
[1] https://en.wikipedia.org/wiki/Jaguar_(microarchitecture)
