Table of Contents
17 relations: AnandTech, ARM architecture family, ARM big.LITTLE, ARM Cortex-A12, ARM Cortex-A9, Arm Holdings, Cache coherence, Comparison of ARM processors, CPU cache, Floating-point arithmetic, Hertz, Instruction pipelining, List of ARM processors, List of products using ARM processors, Out-of-order execution, Single instruction, multiple data, Virtualization.
- ARM Holdings IP cores
- ARM processors
AnandTech
AnandTech is an online computer hardware magazine owned by Future plc.
See ARM Cortex-A17 and AnandTech
ARM architecture family
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of RISC instruction set architectures (ISAs) for computer processors.
See ARM Cortex-A17 and ARM architecture family
ARM big.LITTLE
ARM big.LITTLE is a heterogeneous computing architecture developed by Arm Holdings, coupling relatively battery-saving and slower processor cores (LITTLE) with relatively more powerful and power-hungry ones (big).
See ARM Cortex-A17 and ARM big.LITTLE
ARM Cortex-A12
The ARM Cortex-A12 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture. ARM Cortex-A17 and ARM Cortex-A12 are ARM Holdings IP cores and ARM processors.
See ARM Cortex-A17 and ARM Cortex-A12
ARM Cortex-A9
The ARM Cortex-A9 MPCore is a 32-bit multi-core processor that provides up to 4 cache-coherent cores, each implementing the ARM v7 architecture instruction set. ARM Cortex-A17 and ARM Cortex-A9 are ARM Holdings IP cores and ARM processors.
See ARM Cortex-A17 and ARM Cortex-A9
Arm Holdings
Arm Holdings plc (formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a British semiconductor and software design company based in Cambridge, England, whose primary business is the design of central processing unit (CPU) cores that implement the ARM architecture family of instruction sets.
See ARM Cortex-A17 and Arm Holdings
Cache coherence
In computer architecture, cache coherence is the uniformity of shared resource data that ends up stored in multiple local caches.
See ARM Cortex-A17 and Cache coherence
Comparison of ARM processors
This is a comparison of ARM instruction set architecture application processor cores designed by ARM Holdings (ARM Cortex-A) and 3rd parties. ARM Cortex-A17 and comparison of ARM processors are ARM processors.
See ARM Cortex-A17 and Comparison of ARM processors
CPU cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory.
See ARM Cortex-A17 and CPU cache
Floating-point arithmetic
In computing, floating-point arithmetic (FP) is arithmetic that represents subsets of real numbers using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base.
See ARM Cortex-A17 and Floating-point arithmetic
Hertz
The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second.
Instruction pipelining
In computer engineering, instruction pipelining is a technique for implementing instruction-level parallelism within a single processor.
See ARM Cortex-A17 and Instruction pipelining
List of ARM processors
This is a list of central processing units based on the ARM family of instruction sets designed by ARM Ltd. and third parties, sorted by version of the ARM instruction set, release and name. ARM Cortex-A17 and list of ARM processors are ARM processors.
See ARM Cortex-A17 and List of ARM processors
List of products using ARM processors
This is a list of products using processors (i.e. central processing units) based on the ARM architecture family, sorted by generation release and name. ARM Cortex-A17 and list of products using ARM processors are ARM processors.
See ARM Cortex-A17 and List of products using ARM processors
Out-of-order execution
In computer engineering, out-of-order execution (or more formally dynamic execution) is a paradigm used in high-performance central processing units to make use of instruction cycles that would otherwise be wasted.
See ARM Cortex-A17 and Out-of-order execution
Single instruction, multiple data
Single instruction, multiple data (SIMD) is a type of parallel processing in Flynn's taxonomy.
See ARM Cortex-A17 and Single instruction, multiple data
Virtualization
In computing, virtualization or virtualisation in British English (sometimes abbreviated v12n, a numeronym) is the act of creating a virtual (rather than actual) version of something at the same abstraction level, including virtual computer hardware platforms, storage devices, and computer network resources.
See ARM Cortex-A17 and Virtualization
See also
ARM Holdings IP cores
- ARM Cortex-A12
- ARM Cortex-A15
- ARM Cortex-A17
- ARM Cortex-A5
- ARM Cortex-A7
- ARM Cortex-A8
- ARM Cortex-A9
ARM processors
- AMULET (processor)
- ARM Cortex-A
- ARM Cortex-A12
- ARM Cortex-A15
- ARM Cortex-A17
- ARM Cortex-A34
- ARM Cortex-A5
- ARM Cortex-A510
- ARM Cortex-A520
- ARM Cortex-A53
- ARM Cortex-A55
- ARM Cortex-A57
- ARM Cortex-A7
- ARM Cortex-A710
- ARM Cortex-A715
- ARM Cortex-A72
- ARM Cortex-A720
- ARM Cortex-A73
- ARM Cortex-A75
- ARM Cortex-A76
- ARM Cortex-A77
- ARM Cortex-A78
- ARM Cortex-A8
- ARM Cortex-A9
- ARM Cortex-M
- ARM Cortex-R
- ARM Cortex-X1
- ARM Cortex-X2
- ARM Cortex-X3
- ARM Cortex-X4
- ARM Neoverse
- ARM11
- ARM7
- ARM9
- Atmel ARM-based processors
- Comparison of ARM processors
- Fujitsu A64FX
- IXP1200
- Krait (processor)
- Kryo
- List of ARM processors
- List of products using ARM processors
- Project Denver
- Qualcomm Oryon
- Scorpion (processor)
- StrongARM
References
Also known as ARM Cortex-A17 MPCore, Cortex-A17.