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Broadwell (microarchitecture)

Index Broadwell (microarchitecture)

Broadwell is Intel's codename for the 14 nanometer die shrink of its Haswell microarchitecture. [1]

79 relations: Advanced Vector Extensions, AES instruction set, Arbitrary-precision arithmetic, Backward compatibility, Ball grid array, Bitstream format, Brian Krzanich, Celeron, CLMUL instruction set, Clock rate, Computex, CPU cache, DDR4 SDRAM, Desktop computer, Die (integrated circuit), Die shrink, Direct Media Interface, Direct3D, EDRAM, FinFET, FMA instruction set, Graphics processing unit, Haswell (microarchitecture), High Efficiency Video Coding, Instruction set architecture, Integer, Intel ADX, Intel HD, UHD and Iris Graphics, Intel Quick Sync Video, Intel QuickPath Interconnect, Intel Socket G3, Intel Turbo Boost, Johnson–Nyquist noise, Kibibyte, LGA 1150, LGA 2011, List of Intel chipsets, List of Intel codenames, List of Intel Core i3 microprocessors, List of Intel Core i5 microprocessors, List of Intel Core i7 microprocessors, List of Intel Core M microprocessors, List of Intel CPU microarchitectures, Mebibyte, Microarchitecture, Mini-ITX, MMX (instruction set), Next Unit of Computing, OpenCL, OpenGL, ..., PCI Express, Pentium, Platform Controller Hub, Random number generation, RdRand, Skylake (microarchitecture), SSE2, SSE3, SSE4, SSSE3, Stepping level, Streaming SIMD Extensions, Supervisor Mode Access Prevention, System on a chip, The Tech Report, Thermal design power, Tick–tock model, Transactional Synchronization Extensions, Trusted Execution Technology, Ultrabook, VP8, VP9, Windows XP, X86, X86 virtualization, X86-64, Xeon, 14 nanometer, 3DNow!. Expand index (29 more) »

Advanced Vector Extensions

Advanced Vector Extensions (AVX, also known as Sandy Bridge New Extensions) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge processor shipping in Q1 2011 and later on by AMD with the Bulldozer processor shipping in Q3 2011.

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AES instruction set

Advanced Encryption Standard instruction set (or the Intel Advanced Encryption Standard New Instructions; AES-NI) is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008.

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Arbitrary-precision arithmetic

In computer science, arbitrary-precision arithmetic, also called bignum arithmetic, multiple-precision arithmetic, or sometimes infinite-precision arithmetic, indicates that calculations are performed on numbers whose digits of precision are limited only by the available memory of the host system.

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Backward compatibility

Backward compatibility is a property of a system, product, or technology that allows for interoperability with an older legacy system, or with input designed for such a system, especially in telecommunications and computing.

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Ball grid array

A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits.

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Bitstream format

A bitstream format is the format of the data found in a stream of bits used in a digital communication or data storage application.

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Brian Krzanich

Brian Matthew Krzanich (born May 9, 1960) is the former chief executive officer (CEO) of Intel.

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Celeron

Celeron is a brand name given by Intel to a number of different low-end IA-32 and x86-64 computer microprocessor models targeted at budget personal computers.

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CLMUL instruction set

Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010.

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Clock rate

The clock rate typically refers to the frequency at which a chip like a central processing unit (CPU), one core of a multi-core processor, is running and is used as an indicator of the processor's speed.

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Computex

COMPUTEX Taipei, or Taipei International Information Technology Show, is a computer expo held annually in Taipei, Taiwan.

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CPU cache

A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory.

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DDR4 SDRAM

In computing, DDR4 SDRAM, an abbreviation for double data rate fourth-generation synchronous dynamic random-access memory, is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface.

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Desktop computer

A desktop computer is a personal computer designed for regular use at a single location on or near a desk or table due to its size and power requirements.

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Die (integrated circuit)

A die (pronunciation: /daɪ/) in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.

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Die shrink

The term die shrink (sometimes optical shrink or process shrink) refers to a simple semiconductor scaling of semiconductor devices, mainly transistors.

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Direct Media Interface

In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge and southbridge on a computer motherboard.

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Direct3D

Direct3D is a graphics application programming interface (API) for Microsoft Windows.

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EDRAM

Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor.

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FinFET

A Fin Field-effect transistor (FinFET) is a MOSFET tri-gate transistor built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, forming a double gate structure.

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FMA instruction set

The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations.

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Graphics processing unit

A graphics processing unit (GPU) is a specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device.

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Haswell (microarchitecture)

Haswell is the codename for a processor microarchitecture developed by Intel as the "fourth-generation core" successor to the Ivy Bridge microarchitecture.

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High Efficiency Video Coding

High Efficiency Video Coding (HEVC), also known as H.265 and MPEG-H Part 2, is a video compression standard, one of several potential successors to the widely used AVC (H.264 or MPEG-4 Part 10).

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Instruction set architecture

An instruction set architecture (ISA) is an abstract model of a computer.

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Integer

An integer (from the Latin ''integer'' meaning "whole")Integer 's first literal meaning in Latin is "untouched", from in ("not") plus tangere ("to touch").

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Intel ADX

Intel ADX (Multi-Precision Add-Carry Instruction Extensions) is Intel's arbitrary-precision arithmetic extension to the x86 instruction set architecture (ISA).

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Intel HD, UHD and Iris Graphics

Intel HD Graphics is a series of integrated graphics processors (IGPs) introduced by Intel in 2010 that are manufactured on the same package or die as the central processing unit (CPU).

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Intel Quick Sync Video

Intel Quick Sync Video is Intel's brand for its dedicated video encoding and decoding hardware core.

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Intel QuickPath Interconnect

The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon, Itanium, and certain desktop platforms starting in 2008.

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Intel Socket G3

Socket G3, also known as rPGA 946B/947 or FCPGA 946, is a socket for Intel microprocessors that supports Haswell-based mobile CPUs.

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Intel Turbo Boost

Intel Turbo Boost is Intel's trade name for a feature that automatically raises certain of its processors' operating frequency, and thus performance, when demanding tasks are running.

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Johnson–Nyquist noise

Johnson–Nyquist noise (thermal noise, Johnson noise, or Nyquist noise) is the electronic noise generated by the thermal agitation of the charge carriers (usually the electrons) inside an electrical conductor at equilibrium, which happens regardless of any applied voltage.

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Kibibyte

The kibibyte is a multiple of the unit byte for quantities of digital information.

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LGA 1150

LGA 1150, also known as Socket H3, is a microprocessor socket used by Intel's central processing units (CPUs) built on the Haswell microarchitecture.

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LGA 2011

LGA 2011, also called Socket R, is a CPU socket by Intel.

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List of Intel chipsets

This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx series).

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List of Intel codenames

Intel has historically named integrated circuit (IC) development projects after geographical names of towns, rivers or mountains near the location of the Intel facility responsible for the IC.

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List of Intel Core i3 microprocessors

The following is a list of Intel Core i3 brand microprocessors.

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List of Intel Core i5 microprocessors

The following is a list of Intel Core i5 brand microprocessors.

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List of Intel Core i7 microprocessors

The following is a list of Intel Core i7 brand microprocessors.

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List of Intel Core M microprocessors

Intel Core M is a family of ultra low-voltage microprocessors belonging to the Intel Core series and designed specifically for ultra-thin notebooks, 2-in-1 detachables, and other mobile devices.

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List of Intel CPU microarchitectures

The following is a partial list of Intel CPU microarchitectures.

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Mebibyte

The mebibyte is a multiple of the unit byte for digital information.

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Microarchitecture

In computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as µarch or uarch, is the way a given instruction set architecture (ISA), is implemented in a particular processor.

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Mini-ITX

Mini-ITX is a motherboard, developed by VIA Technologies in 2001.

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MMX (instruction set)

MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1997 with its P5-based Pentium line of microprocessors, designated as "Pentium with MMX Technology".

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Next Unit of Computing

Next Unit of Computing (NUC) is a small-form-factor personal computer designed by Intel.

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OpenCL

OpenCL (Open Computing Language) is a framework for writing programs that execute across heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), field-programmable gate arrays (FPGAs) and other processors or hardware accelerators.

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OpenGL

Open Graphics Library (OpenGL) is a cross-language, cross-platform application programming interface (API) for rendering 2D and 3D vector graphics.

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PCI Express

PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X, and AGP bus standards.

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Pentium

Pentium is a brand used for a series of x86 architecture-compatible microprocessors produced by Intel since 1993.

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Platform Controller Hub

The Platform Controller Hub (PCH) is a family of Intel chipsets, introduced circa 2008.

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Random number generation

Random number generation is the generation of a sequence of numbers or symbols that cannot be reasonably predicted better than by a random chance, usually through a hardware random-number generator (RNG).

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RdRand

RDRAND (previously known as Bull Mountain) is an instruction for returning random numbers from an Intel on-chip hardware random number generator which has been seeded by an on-chip entropy source.

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Skylake (microarchitecture)

Skylake is the codename used by Intel for a processor microarchitecture that was launched in August 2015 succeeding the Broadwell microarchitecture.

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SSE2

SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000.

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SSE3

SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture.

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SSE4

SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L).

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SSSE3

Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.

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Stepping level

The term stepping level or revision level in the context of CPU architecture or integrated circuit is a version number.

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Streaming SIMD Extensions

In computing, Streaming SIMD Extensions (SSE) is an SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of processors shortly after the appearance of AMD's 3DNow!.

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Supervisor Mode Access Prevention

Supervisor Mode Access Prevention (SMAP) is a feature of some CPU implementations such as the Intel Broadwell microarchitecture that allows supervisor mode programs to optionally set user-space memory mappings so that access to those mappings from supervisor mode will cause a trap.

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System on a chip

A system on a chip or system on chip (SoC) is an integrated circuit (also known as an "IC" or "chip") that integrates all components of a computer or other electronic systems.

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The Tech Report

The Tech Report is a web site dedicated to covering personal computing technology and culture.

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Thermal design power

The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often the CPU or GPU) that the cooling system in a computer is designed to dissipate under any workload.

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Tick–tock model

Tick–tock is a model adopted in 2007 by chip manufacturer Intel.

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Transactional Synchronization Extensions

Transactional Synchronization Extensions (TSX-NI) is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding up execution of multi-threaded software through lock elision.

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Trusted Execution Technology

Intel Trusted Execution Technology (Intel TXT, formerly known as LaGrande Technology) is a computer hardware technology whose primary goals are.

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Ultrabook

Ultrabook is an Intel specification and trademark for a line of high-end subnotebook computers featuring reduced bulk without compromising battery life.

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VP8

VP8 is an open and royalty free video compression format owned by Google and created by On2 Technologies as a successor to VP7.

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VP9

VP9 is an open and royalty-free video coding format developed by Google.

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Windows XP

Windows XP (codenamed Whistler) is a personal computer operating system that was produced by Microsoft as part of the Windows NT family of operating systems.

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X86

x86 is a family of backward-compatible instruction set architectures based on the Intel 8086 CPU and its Intel 8088 variant.

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X86 virtualization

In computing, x86 virtualization refers to hardware virtualization for the x86 architecture.

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X86-64

x86-64 (also known as x64, x86_64, AMD64 and Intel 64) is the 64-bit version of the x86 instruction set.

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Xeon

Xeon is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets.

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14 nanometer

The 14 nanometer (14 nm) semiconductor device fabrication node is the technology node following the 22 nm/(20 nm) node.

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3DNow!

3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices (AMD).

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Broadwell (CPU), Broadwell (Microarchitecture), Broadwell-C, Broadwell-E, Broadwell-EP, Broadwell-EX, Broadwell-H, Broadwell-K, Broadwell-U, Broadwell-Y, Core i7-6800K, Core i7-6850K, Core i7-6900K, Core i7-6950X, Core-M, Intel Broadwell, Intel Core gen5 (Broadwell), Intel Core i7-6800K, Intel Core i7-6850K, Intel Core i7-6900K, Intel Core i7-6950X, List of Broadwell processors, Rockwell (microarchitecture).

References

[1] https://en.wikipedia.org/wiki/Broadwell_(microarchitecture)

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