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48 relations: Advanced Vector Extensions, AES instruction set, Arrandale, Broadwell (microarchitecture), Cannon Lake (microarchitecture), Clarkdale (microprocessor), Coffee Lake, Die (integrated circuit), Direct Media Interface, ECC memory, FMA instruction set, Front-side bus, Graphics processing unit, Haswell (microarchitecture), Hyper-threading, Intel Core, Intel HD, UHD and Iris Graphics, Intel MPX, Intel Turbo Boost, Ivy Bridge (microarchitecture), Kaby Lake, List of Intel Celeron microprocessors, List of Intel Core i5 microprocessors, List of Intel Core i7 microprocessors, List of Intel Core i9 microprocessors, List of Intel Pentium microprocessors, Microprocessor, MMX (instruction set), Multi-chip module, NX bit, Sandy Bridge, Second Level Address Translation, Skylake (microarchitecture), Smart Cache, Software Guard Extensions, SpeedStep, SSE2, SSE3, SSE4, SSSE3, Stepping level, Streaming SIMD Extensions, System in package, Thermal design power, Transactional Synchronization Extensions, Westmere (microarchitecture), X86 virtualization, X86-64.
Advanced Vector Extensions
Advanced Vector Extensions (AVX, also known as Sandy Bridge New Extensions) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge processor shipping in Q1 2011 and later on by AMD with the Bulldozer processor shipping in Q3 2011.
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AES instruction set
Advanced Encryption Standard instruction set (or the Intel Advanced Encryption Standard New Instructions; AES-NI) is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008.
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Arrandale
Arrandale is the code name for a family of mobile Intel processors, sold as mobile Intel Core i3, i5 and i7 as well as Celeron and Pentium.
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Broadwell (microarchitecture)
Broadwell is Intel's codename for the 14 nanometer die shrink of its Haswell microarchitecture.
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Cannon Lake (microarchitecture)
Cannon Lake (formerly Skymont) is Intel's codename for the 10-nanometer die shrink of the Kaby Lake microarchitecture.
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Clarkdale (microprocessor)
Clarkdale is the code name for an Intel processor, initially sold as desktop Intel Core i5 and Core i3 and Pentium.
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Coffee Lake
Coffee Lake is Intel's codename for the second 14 nm process refinement following Broadwell, Skylake, and Kaby Lake.
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Die (integrated circuit)
A die (pronunciation: /daɪ/) in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.
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Direct Media Interface
In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge and southbridge on a computer motherboard.
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ECC memory
Error-correcting code memory (ECC memory) is a type of computer data storage that can detect and correct the most common kinds of internal data corruption.
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FMA instruction set
The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations.
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Front-side bus
A front-side bus (FSB) was a computer communication interface (bus) often used in Intel-chip-based computers during the 1990s and 2000s.
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Graphics processing unit
A graphics processing unit (GPU) is a specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device.
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Haswell (microarchitecture)
Haswell is the codename for a processor microarchitecture developed by Intel as the "fourth-generation core" successor to the Ivy Bridge microarchitecture.
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Hyper-threading
Hyper-threading (officially called Hyper-Threading Technology or HT Technology, and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multiple tasks at once) performed on x86 microprocessors.
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Intel Core
Intel Core is a line of mid-to-high end consumer, workstation, and enthusiast central processing units (CPU) marketed by Intel Corporation.
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Intel HD, UHD and Iris Graphics
Intel HD Graphics is a series of integrated graphics processors (IGPs) introduced by Intel in 2010 that are manufactured on the same package or die as the central processing unit (CPU).
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Intel MPX
Intel MPX (Memory Protection Extensions) is a set of extensions to the x86 instruction set architecture.
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Intel Turbo Boost
Intel Turbo Boost is Intel's trade name for a feature that automatically raises certain of its processors' operating frequency, and thus performance, when demanding tasks are running.
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Ivy Bridge (microarchitecture)
Ivy Bridge is the codename for the "third generation" of the Intel Core processors (Core i7, i5, i3).
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Kaby Lake
Kaby Lake is an Intel codename for a processor microarchitecture Intel announced on August 30, 2016.
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List of Intel Celeron microprocessors
The Celeron is a family of microprocessors from Intel targeted at the low-end consumer market.
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List of Intel Core i5 microprocessors
The following is a list of Intel Core i5 brand microprocessors.
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List of Intel Core i7 microprocessors
The following is a list of Intel Core i7 brand microprocessors.
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List of Intel Core i9 microprocessors
The following is a list of Intel Core i9 brand microprocessors.
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List of Intel Pentium microprocessors
The Intel Pentium brand refers to mainstream x86-architecture microprocessors from Intel.
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Microprocessor
A microprocessor is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit (IC), or at most a few integrated circuits.
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MMX (instruction set)
MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1997 with its P5-based Pentium line of microprocessors, designated as "Pentium with MMX Technology".
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Multi-chip module
A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or "pins") where multiple integrated circuits (ICs or "chips"), semiconductor dies and/or other discrete components are integrated, usually onto a unifying substrate, so that in use it is treated as if it were a single component (as though a larger IC).
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NX bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (code) or for storage of data, a feature normally only found in Harvard architecture processors.
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Sandy Bridge
Sandy Bridge is the codename for the microarchitecture used in the "second generation" of the Intel Core processors (Core i7, i5, i3) - the Sandy Bridge microarchitecture is the successor to Nehalem microarchitecture.
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Second Level Address Translation
Second Level Address Translation (SLAT), also known as nested paging, is a hardware-assisted virtualization technology which makes it possible to avoid the overhead associated with software-managed shadow page tables.
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Skylake (microarchitecture)
Skylake is the codename used by Intel for a processor microarchitecture that was launched in August 2015 succeeding the Broadwell microarchitecture.
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Smart Cache
Smart Cache is a level 2 or level 3 caching method for multiple execution cores, developed by Intel.
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Software Guard Extensions
Intel SGX is a set of central processing unit (CPU) instruction codes from Intel that allows user-level code to allocate private regions of memory, called enclaves, that are protected from processes running at higher privilege levels.
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SpeedStep
Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed (to different P-states) by software.
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SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000.
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SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture.
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SSE4
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L).
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SSSE3
Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.
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Stepping level
The term stepping level or revision level in the context of CPU architecture or integrated circuit is a version number.
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Streaming SIMD Extensions
In computing, Streaming SIMD Extensions (SSE) is an SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of processors shortly after the appearance of AMD's 3DNow!.
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System in package
A system in package (SiP) or system-in-a-package is a number of integrated circuits enclosed in a single module (package).
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Thermal design power
The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often the CPU or GPU) that the cooling system in a computer is designed to dissipate under any workload.
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Transactional Synchronization Extensions
Transactional Synchronization Extensions (TSX-NI) is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding up execution of multi-threaded software through lock elision.
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Westmere (microarchitecture)
Westmere (formerly Nehalem-C) is the name given to the 32 nm die shrink of Nehalem.
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X86 virtualization
In computing, x86 virtualization refers to hardware virtualization for the x86 architecture.
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X86-64
x86-64 (also known as x64, x86_64, AMD64 and Intel 64) is the 64-bit version of the x86 instruction set.
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References
[1] https://en.wikipedia.org/wiki/List_of_Intel_Core_i3_microprocessors
