62 relations: Advanced Vector Extensions, AES instruction set, Arrandale, AVX-512, Bit Manipulation Instruction Sets, Bloomfield (microprocessor), Broadwell (microarchitecture), Clarksfield (microprocessor), Coffee Lake, Comparison of Intel processors, CPU cache, DDR3 SDRAM, DDR4 SDRAM, Die (integrated circuit), DIMM, Direct Media Interface, EDRAM, F16C, FMA instruction set, Front-side bus, Graphics processing unit, Gulftown, Haswell (microarchitecture), Hyper-threading, Intel Core, Intel HD, UHD and Iris Graphics, Intel MPX, Intel QuickPath Interconnect, Intel Turbo Boost, Intel vPro, Ivy Bridge (microarchitecture), Kaby Lake, List of Intel Celeron microprocessors, List of Intel Core i3 microprocessors, List of Intel Core i5 microprocessors, List of Intel Core i9 microprocessors, List of Intel Pentium microprocessors, Lynnfield (microprocessor), Microprocessor, MMX (instruction set), Multi-chip module, Nehalem (microarchitecture), NX bit, Sandy Bridge, Sandy Bridge-E, Skylake (microarchitecture), Smart Cache, Software Guard Extensions, SpeedStep, SSE2, ..., SSE3, SSE4, SSSE3, Stepping level, Streaming SIMD Extensions, System in package, Thermal design power, Transactional Synchronization Extensions, Trusted Execution Technology, Westmere (microarchitecture), X86 virtualization, X86-64. Expand index (12 more) » « Shrink index
Advanced Vector Extensions (AVX, also known as Sandy Bridge New Extensions) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge processor shipping in Q1 2011 and later on by AMD with the Bulldozer processor shipping in Q3 2011.
Advanced Encryption Standard instruction set (or the Intel Advanced Encryption Standard New Instructions; AES-NI) is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008.
Arrandale is the code name for a family of mobile Intel processors, sold as mobile Intel Core i3, i5 and i7 as well as Celeron and Pentium.
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and supported in Intel's Xeon Phi x200 (Knights Landing) and Skylake-X CPUs; this includes the (excluding the Core i5-7640X and Core i7-7740X), as well as the new Xeon Scalable Processor Family and Xeon D-2100 Embedded Series.
Bit Manipulation Instructions Sets (BMI sets) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD.
Bloomfield is the code name for Intel high-end desktop processors sold as Core i7-9xx and single-processor servers sold as Xeon 35xx., in almost identical configurations, replacing the earlier Yorkfield processors.
Broadwell is Intel's codename for the 14 nanometer die shrink of its Haswell microarchitecture.
Clarksfield is the code name for an Intel processor, initially sold as mobile Intel Core i7.
Coffee Lake is Intel's codename for the second 14 nm process refinement following Broadwell, Skylake, and Kaby Lake.
As of 2016, the majority of personal computers and laptops sold are based on the x86 architecture (despite inroads from Chromebook-style ARM designs, the segment-leading Apple MacBook family remains exclusively x86), while other categories—especially high-volume mobile categories such as smartphones or tablets—are dominated by ARM; at the high end, x86 continues to dominate compute-intensive workstation and cloud computing segments.
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory.
Double data rate type three SDRAM (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007.
In computing, DDR4 SDRAM, an abbreviation for double data rate fourth-generation synchronous dynamic random-access memory, is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface.
A die (pronunciation: /daɪ/) in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.
A DIMM or dual in-line memory module comprises a series of dynamic random-access memory integrated circuits.
In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge and southbridge on a computer motherboard.
Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor.
The F16C (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting between half-precision and standard IEEE single-precision floating-point formats.
The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations.
A front-side bus (FSB) was a computer communication interface (bus) often used in Intel-chip-based computers during the 1990s and 2000s.
A graphics processing unit (GPU) is a specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device.
Gulftown or Westmere-EP is the codename of an up to six-core hyperthreaded Intel processor able to run up to 12 threads in parallel.
Haswell is the codename for a processor microarchitecture developed by Intel as the "fourth-generation core" successor to the Ivy Bridge microarchitecture.
Hyper-threading (officially called Hyper-Threading Technology or HT Technology, and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multiple tasks at once) performed on x86 microprocessors.
Intel Core is a line of mid-to-high end consumer, workstation, and enthusiast central processing units (CPU) marketed by Intel Corporation.
Intel HD Graphics is a series of integrated graphics processors (IGPs) introduced by Intel in 2010 that are manufactured on the same package or die as the central processing unit (CPU).
Intel MPX (Memory Protection Extensions) is a set of extensions to the x86 instruction set architecture.
The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon, Itanium, and certain desktop platforms starting in 2008.
Intel Turbo Boost is Intel's trade name for a feature that automatically raises certain of its processors' operating frequency, and thus performance, when demanding tasks are running.
Intel vPro technology is an umbrella marketing term used by Intel for a large collection of computer hardware technologies, including Hyperthreading, Turbo Boost 3.0, VT-x, VT-d, Trusted Execution Technology (TXT), and Intel Active Management Technology (AMT).
Ivy Bridge is the codename for the "third generation" of the Intel Core processors (Core i7, i5, i3).
Kaby Lake is an Intel codename for a processor microarchitecture Intel announced on August 30, 2016.
The Celeron is a family of microprocessors from Intel targeted at the low-end consumer market.
The following is a list of Intel Core i3 brand microprocessors.
The following is a list of Intel Core i5 brand microprocessors.
The following is a list of Intel Core i9 brand microprocessors.
The Intel Pentium brand refers to mainstream x86-architecture microprocessors from Intel.
Lynnfield is the code name for a quad-core processor from Intel released in September 2009.
A microprocessor is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit (IC), or at most a few integrated circuits.
MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1997 with its P5-based Pentium line of microprocessors, designated as "Pentium with MMX Technology".
A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or "pins") where multiple integrated circuits (ICs or "chips"), semiconductor dies and/or other discrete components are integrated, usually onto a unifying substrate, so that in use it is treated as if it were a single component (as though a larger IC).
Nehalem is the codename for an Intel processor microarchitecture released in November 2008.
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (code) or for storage of data, a feature normally only found in Harvard architecture processors.
Sandy Bridge is the codename for the microarchitecture used in the "second generation" of the Intel Core processors (Core i7, i5, i3) - the Sandy Bridge microarchitecture is the successor to Nehalem microarchitecture.
Sandy Bridge-E is the codename of an eight-core Intel processor based on the Sandy Bridge microarchitecture.
Skylake is the codename used by Intel for a processor microarchitecture that was launched in August 2015 succeeding the Broadwell microarchitecture.
Smart Cache is a level 2 or level 3 caching method for multiple execution cores, developed by Intel.
Intel SGX is a set of central processing unit (CPU) instruction codes from Intel that allows user-level code to allocate private regions of memory, called enclaves, that are protected from processes running at higher privilege levels.
Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed (to different P-states) by software.
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000.
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture.
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L).
Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.
The term stepping level or revision level in the context of CPU architecture or integrated circuit is a version number.
In computing, Streaming SIMD Extensions (SSE) is an SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of processors shortly after the appearance of AMD's 3DNow!.
A system in package (SiP) or system-in-a-package is a number of integrated circuits enclosed in a single module (package).
The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often the CPU or GPU) that the cooling system in a computer is designed to dissipate under any workload.
Transactional Synchronization Extensions (TSX-NI) is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding up execution of multi-threaded software through lock elision.
Intel Trusted Execution Technology (Intel TXT, formerly known as LaGrande Technology) is a computer hardware technology whose primary goals are.
Westmere (formerly Nehalem-C) is the name given to the 32 nm die shrink of Nehalem.
In computing, x86 virtualization refers to hardware virtualization for the x86 architecture.
x86-64 (also known as x64, x86_64, AMD64 and Intel 64) is the 64-bit version of the x86 instruction set.
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