77 relations: Address decoder, Advanced Vector Extensions, Algorithm, AltiVec, Arithmetic logic unit, Array data structure, Assembly line, Automatic vectorization, Barrel processor, CDC 7600, CDC STAR-100, Cell (microprocessor), Central processing unit, Chaining (vector processing), Computational fluid dynamics, Compute kernel, Computer for operations with functions, Computer simulation, Computing, Control Data Corporation, Coprocessor, Cray, Cray X-MP, Cray Y-MP, Cray-1, Cray-2, Data set, ETA10, Execution unit, Floating Point Systems, Floating-point arithmetic, FLOPS, FR-V (microprocessor), Fujitsu, General-purpose computing on graphics processing units, GNU Compiler Collection, Graphics processing unit, Heterogeneous computing, Hitachi, IBM, IBM ViVA, ILLIAC IV, Instruction pipelining, Instruction set architecture, Latency (engineering), Massively parallel, Memory latency, Microprocessor, MIMD, Minicomputer, ..., Minisupercomputer, MMX (instruction set), NEC, Oregon, Pipeline (computing), PlayStation 3, PowerPC, Price–performance ratio, RISC-V, Scalar processor, SIMD, Sony, Stream processing, Streaming SIMD Extensions, Supercomputer, Tensor processing unit, Texas Instruments, TI Advanced Scientific Computer, Toshiba, University of Illinois at Urbana–Champaign, Variable (computer science), Very long instruction word, Video game console, Visual Instruction Set, Westinghouse Electric Corporation, X86, 3DNow!. Expand index (27 more) » « Shrink index
In digital electronics, an address decoder is a binary decoder that has two or more inputs for address bits and one or more outputs for device selection signals.
Advanced Vector Extensions (AVX, also known as Sandy Bridge New Extensions) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge processor shipping in Q1 2011 and later on by AMD with the Bulldozer processor shipping in Q3 2011.
In mathematics and computer science, an algorithm is an unambiguous specification of how to solve a class of problems.
AltiVec is a single-precision floating point and integer SIMD instruction set designed and owned by Apple, IBM, and Freescale Semiconductor (formerly Motorola's Semiconductor Products Sector) — the AIM alliance.
An arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs arithmetic and bitwise operations on integer binary numbers.
In computer science, an array data structure, or simply an array, is a data structure consisting of a collection of elements (values or variables), each identified by at least one array index or key.
An assembly line is a manufacturing process (often called a progressive assembly) in which parts (usually interchangeable parts) are added as the semi-finished assembly moves from workstation to workstation where the parts are added in sequence until the final assembly is produced.
Automatic vectorization, in parallel computing, is a special case of automatic parallelization, where a computer program is converted from a scalar implementation, which processes a single pair of operands at a time, to a vector implementation, which processes one operation on multiple pairs of operands at once.
A barrel processor is a CPU that switches between threads of execution on every cycle.
The CDC 7600 was the Seymour Cray-designed successor to the CDC 6600, extending Control Data's dominance of the supercomputer field into the 1970s.
The CDC STAR-100 is a vector supercomputer that was designed, manufactured, and marketed by Control Data Corporation (CDC).
Cell is a multi-core microprocessor microarchitecture that combines a general-purpose Power Architecture core of modest performance with streamlined coprocessing elements which greatly accelerate multimedia and vector processing applications, as well as many other forms of dedicated computation.
A central processing unit (CPU) is the electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logical, control and input/output (I/O) operations specified by the instructions.
In computing, chaining is a technique used in computer architecture in which scalar and vector registers generate interim results which can be used immediately, without additional memory references which reduce computational speed.
Computational fluid dynamics (CFD) is a branch of fluid mechanics that uses numerical analysis and data structures to solve and analyze problems that involve fluid flows.
In computing, a compute kernel is a routine compiled for high throughput accelerators (such as GPUs, DSPs or FPGAs), separate from (but used by) a main program.
A computer for operations with (mathematical) functions (unlike the usual computer) operates with functions at the hardware level (i.e. without programming these operations).
Computer simulation is the reproduction of the behavior of a system using a computer to simulate the outcomes of a mathematical model associated with said system.
Computing is any goal-oriented activity requiring, benefiting from, or creating computers.
Control Data Corporation (CDC) was a mainframe and supercomputer firm.
A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU).
Cray Inc. is an American supercomputer manufacturer headquartered in Seattle, Washington.
The Cray X-MP is a supercomputer designed, built and sold by Cray Research.
The Cray Y-MP was a supercomputer sold by Cray Research from 1988, and the successor to the company's X-MP.
The Cray-1 was a supercomputer designed, manufactured and marketed by Cray Research.
The Cray-2 is a supercomputer with four vector processors made by Cray Research starting in 1985.
A data set (or dataset) is a collection of data.
The ETA10 is a line of vector supercomputers designed, manufactured, and marketed by ETA Systems, a spin-off division of Control Data Corporation (CDC).
In computer engineering, an execution unit (also called a functional unit) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program.
Floating Point Systems Inc. (FPS) was a Beaverton, Oregon vendor of attached array processors and minisupercomputers.
In computing, floating-point arithmetic is arithmetic using formulaic representation of real numbers as an approximation so as to support a trade-off between range and precision.
In computing, floating point operations per second (FLOPS, flops or flop/s) is a measure of computer performance, useful in fields of scientific computations that require floating-point calculations.
The Fujitsu FR-V (Fujitsu RISC-VLIW) is one of the very few processors ever able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high parallel computing while increasing performance per watt and hardware efficiency.
is a Japanese multinational information technology equipment and services company headquartered in Tokyo, Japan.
General-purpose computing on graphics processing units (GPGPU, rarely GPGP) is the use of a graphics processing unit (GPU), which typically handles computation only for computer graphics, to perform computation in applications traditionally handled by the central processing unit (CPU).
The GNU Compiler Collection (GCC) is a compiler system produced by the GNU Project supporting various programming languages.
A graphics processing unit (GPU) is a specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device.
Heterogeneous computing refers to systems that use more than one kind of processor or cores.
() is a Japanese multinational conglomerate company headquartered in Chiyoda, Tokyo, Japan.
The International Business Machines Corporation (IBM) is an American multinational technology company headquartered in Armonk, New York, United States, with operations in over 170 countries.
ViVA (Virtual Vector Architecture) is a technology from IBM for coupling together multiple scalar floating point units to act as a single vector processor.
The ILLIAC IV was the first massively parallel computer.
Instruction pipelining is a technique for implementing instruction-level parallelism within a single processor.
An instruction set architecture (ISA) is an abstract model of a computer.
Latency is a time interval between the stimulation and response, or, from a more general point of view, a time delay between the cause and the effect of some physical change in the system being observed.
In computing, massively parallel refers to the use of a large number of processors (or separate computers) to perform a set of coordinated computations in parallel (simultaneously).
In computing, memory latency is the time (the latency) between initiating a request for a byte or word in memory until it is retrieved by a processor.
A microprocessor is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit (IC), or at most a few integrated circuits.
In computing, MIMD (multiple instruction, multiple data) is a technique employed to achieve parallelism.
A minicomputer, or colloquially mini, is a class of smaller computers that was developed in the mid-1960s and sold for much less than mainframe and mid-size computers from IBM and its direct competitors.
Minisupercomputers constituted a short-lived class of computers that emerged in the mid-1980s, characterized by the combination of vector processing and small-scale multiprocessing.
MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1997 with its P5-based Pentium line of microprocessors, designated as "Pentium with MMX Technology".
is a Japanese multinational provider of information technology (IT) services and products, headquartered in Minato, Tokyo, Japan.
Oregon is a state in the Pacific Northwest region on the West Coast of the United States.
In computing, a pipeline, also known as a data pipeline, is a set of data processing elements connected in series, where the output of one element is the input of the next one.
The PlayStation 3 (PS3) is a home video game console developed by Sony Computer Entertainment.
PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM.
In economics and engineering, the price–performance ratio refers to a product's ability to deliver performance, of any sort, for its price.
RISC-V (pronounced "risk-five") is an open instruction set architecture (ISA) based on established reduced instruction set computing (RISC) principles.
Scalar processors represent a class of computer processors.
Single instruction, multiple data (SIMD) is a class of parallel computers in Flynn's taxonomy.
is a Japanese multinational conglomerate corporation headquartered in Kōnan, Minato, Tokyo.
Stream processing is a computer programming paradigm, equivalent to dataflow programming, event stream processing, and reactive programming, that allows some applications to more easily exploit a limited form of parallel processing.
In computing, Streaming SIMD Extensions (SSE) is an SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of processors shortly after the appearance of AMD's 3DNow!.
A supercomputer is a computer with a high level of performance compared to a general-purpose computer.
A tensor processing unit (TPU) is an AI accelerator application-specific integrated circuit (ASIC) developed by Google specifically for neural network machine learning.
Texas Instruments Inc. (TI) is an American technology company that designs and manufactures semiconductors and various integrated circuits, which it sells to electronics designers and manufacturers globally.
The Advanced Scientific Computer (ASC) is a supercomputer designed and manufactured by Texas Instruments (TI) between 1966 and 1973.
, commonly known as Toshiba, is a Japanese multinational conglomerate headquartered in Tokyo, Japan.
The University of Illinois Urbana–Champaign (also known as U of I, Illinois, or colloquially as the University of Illinois or UIUC) is a public research university in the U.S. state of Illinois and the flagship institution of the University of Illinois System.
In computer programming, a variable or scalar is a storage location (identified by a memory address) paired with an associated symbolic name (an identifier), which contains some known or unknown quantity of information referred to as a value.
Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP).
A video game console is an electronic, digital or computer device that outputs a video signal or visual image to display a video game that one or more people can play.
Visual Instruction Set, or VIS, is a SIMD instruction set extension for SPARC V9 microprocessors developed by Sun Microsystems.
The Westinghouse Electric Corporation was an American manufacturing company.
x86 is a family of backward-compatible instruction set architectures based on the Intel 8086 CPU and its Intel 8088 variant.
3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices (AMD).