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75 relations: Alpha 21264, AMD K5, Branch misprediction, CDC 6600, Central processing unit, Clock signal, Computer architecture, Computer data storage, Computer engineering, Computer memory, CPU cache, Data buffer, Dataflow architecture, Die (integrated circuit), Digital Equipment Corporation, Execution unit, Fujitsu, HAL Computer Systems, HAL SPARC64, Haswell (microarchitecture), Hazard (computer architecture), Hewlett-Packard, IBM, IBM System/360 Model 91, IEEE Transactions on Computers, Instruction cycle, Instruction pipelining, Instruction set architecture, Intel, Intel Atom, Intel Core (microarchitecture), Itanium, Ivy Bridge (microarchitecture), James E. Smith (engineer), Kernel (operating system), Lockstep (computing), Meltdown (security vulnerability), Memory access pattern, Microprocessor, MIPS Technologies, Motorola, Nehalem (microarchitecture), NetBurst (microarchitecture), Operand, Operating system, P6 (microarchitecture), PA-8000, Paradigm, Parallel computing, Pentium 4, ..., Pentium Pro, Pipeline (computing), POWER1, POWER6, PowerPC, PowerPC 600, R10000, Race condition, Re-order buffer, Register file, Register renaming, Replay system, Reservation station, Sandy Bridge, Scoreboarding, Shelving buffer, Spectre (security vulnerability), Speculative execution, Sun Microsystems, Thread (computing), Tomasulo algorithm, Transmeta Crusoe, UltraSPARC, Very long instruction word, Yale Patt. Expand index (25 more) »
Alpha 21264
The Alpha 21264 is a Digital Equipment Corporation RISC microprocessor introduced in October, 1996.
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AMD K5
The K5 is AMD's first x86 processor to be developed entirely in-house.
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Branch misprediction
Branch misprediction occurs when a central processing unit (CPU) mispredicts the next instruction to process in branch prediction, which is aimed at speeding up execution.
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CDC 6600
The CDC 6600 was the flagship of the 6000 series of mainframe computer systems manufactured by Control Data Corporation.
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Central processing unit
A central processing unit (CPU) is the electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logical, control and input/output (I/O) operations specified by the instructions.
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Clock signal
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.
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Computer architecture
In computer engineering, computer architecture is a set of rules and methods that describe the functionality, organization, and implementation of computer systems.
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Computer data storage
Computer data storage, often called storage or memory, is a technology consisting of computer components and recording media that are used to retain digital data.
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Computer engineering
Computer engineering is a discipline that integrates several fields of computer science and electronics engineering required to develop computer hardware and software.
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Computer memory
In computing, memory refers to the computer hardware integrated circuits that store information for immediate use in a computer; it is synonymous with the term "primary storage".
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CPU cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory.
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Data buffer
In computer science, a data buffer (or just buffer) is a region of a physical memory storage used to temporarily store data while it is being moved from one place to another.
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Dataflow architecture
Dataflow architecture is a computer architecture that directly contrasts the traditional von Neumann architecture or control flow architecture.
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Die (integrated circuit)
A die (pronunciation: /daɪ/) in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.
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Digital Equipment Corporation
Digital Equipment Corporation, also known as DEC and using the trademark Digital, was a major American company in the computer industry from the 1950s to the 1990s.
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Execution unit
In computer engineering, an execution unit (also called a functional unit) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program.
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Fujitsu
is a Japanese multinational information technology equipment and services company headquartered in Tokyo, Japan.
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HAL Computer Systems
HAL Computer Systems, Inc was a Campbell, California-based computer manufacturer founded in 1990 by Andrew Heller, a principal designer of the original IBM POWER architecture.
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HAL SPARC64
SPARC64 is a microprocessor developed by HAL Computer Systems and fabricated by Fujitsu.
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Haswell (microarchitecture)
Haswell is the codename for a processor microarchitecture developed by Intel as the "fourth-generation core" successor to the Ivy Bridge microarchitecture.
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Hazard (computer architecture)
In the domain of central processing unit (CPU) design, hazards are problems with the instruction pipeline in CPU microarchitectures when the next instruction cannot execute in the following clock cycle, and can potentially lead to incorrect computation results.
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Hewlett-Packard
The Hewlett-Packard Company (commonly referred to as HP) or shortened to Hewlett-Packard was an American multinational information technology company headquartered in Palo Alto, California.
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IBM
The International Business Machines Corporation (IBM) is an American multinational technology company headquartered in Armonk, New York, United States, with operations in over 170 countries.
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IBM System/360 Model 91
The IBM System/360 Model 91 was announced in 1964 as a competitor to the CDC 6600.
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IEEE Transactions on Computers
IEEE Transactions on Computers is a monthly peer-reviewed scientific journal covering all aspects of computer design.
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Instruction cycle
An instruction cycle (also known as the fetch–decode–execute cycle or the fetch-execute cycle) is the basic operational process of a computer.
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Instruction pipelining
Instruction pipelining is a technique for implementing instruction-level parallelism within a single processor.
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Instruction set architecture
An instruction set architecture (ISA) is an abstract model of a computer.
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Intel
Intel Corporation (stylized as intel) is an American multinational corporation and technology company headquartered in Santa Clara, California, in the Silicon Valley.
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Intel Atom
Intel Atom is the brand name for a line of ultra-low-voltage IA-32 and x86-64 microprocessors by Intel Corporation.
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Intel Core (microarchitecture)
The Intel Core microarchitecture (previously known as the Next-Generation Micro-Architecture) is a multi-core processor microarchitecture unveiled by Intel in Q1 2006.
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Itanium
Itanium is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64).
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Ivy Bridge (microarchitecture)
Ivy Bridge is the codename for the "third generation" of the Intel Core processors (Core i7, i5, i3).
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James E. Smith (engineer)
James E. Smith is a computer engineer and an emeritus professor at the University of Wisconsin–Madison.
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Kernel (operating system)
The kernel is a computer program that is the core of a computer's operating system, with complete control over everything in the system.
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Lockstep (computing)
Lockstep systems are fault-tolerant computer systems that run the same set of operations at the same time in parallel.
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Meltdown (security vulnerability)
Meltdown is a hardware vulnerability affecting Intel x86 microprocessors, IBM POWER processors, and some ARM-based microprocessors.
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Memory access pattern
In computing, a memory access pattern or IO access pattern is the pattern with which a system or program reads and writes memory or secondary storage.
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Microprocessor
A microprocessor is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit (IC), or at most a few integrated circuits.
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MIPS Technologies
MIPS Technologies, Inc., formerly MIPS Computer Systems, Inc., is an American fabless semiconductor design company that is most widely known for developing the MIPS architecture and a series of RISC CPU chips based on it.
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Motorola
Motorola, Inc. was an American multinational telecommunications company founded on September 25, 1928, based in Schaumburg, Illinois.
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Nehalem (microarchitecture)
Nehalem is the codename for an Intel processor microarchitecture released in November 2008.
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NetBurst (microarchitecture)
The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of CPUs made by Intel.
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Operand
In mathematics an operand is the object of a mathematical operation, i.e. it is the quantity that is operated on.
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Operating system
An operating system (OS) is system software that manages computer hardware and software resources and provides common services for computer programs.
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P6 (microarchitecture)
The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995.
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PA-8000
The PA-8000 (PCX-U), code-named Onyx, is a microprocessor developed and fabricated by Hewlett-Packard (HP) that implemented the PA-RISC 2.0 instruction set architecture (ISA).
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Paradigm
In science and philosophy, a paradigm is a distinct set of concepts or thought patterns, including theories, research methods, postulates, and standards for what constitutes legitimate contributions to a field.
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Parallel computing
Parallel computing is a type of computation in which many calculations or the execution of processes are carried out concurrently.
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Pentium 4
Pentium 4 is a brand by Intel for an entire series of single-core CPUs for desktops, laptops and entry-level servers.
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Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995.
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Pipeline (computing)
In computing, a pipeline, also known as a data pipeline, is a set of data processing elements connected in series, where the output of one element is the input of the next one.
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POWER1
The POWER1 is a multi-chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture (ISA).
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POWER6
The POWER6 is a microprocessor developed by IBM that implemented the Power ISA v.2.03.
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PowerPC
PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM.
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PowerPC 600
The PowerPC 600 family was the first family of PowerPC processors built.
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R10000
The R10000, code-named "T5", is a RISC microprocessor implementation of the MIPS IV instruction set architecture (ISA) developed by MIPS Technologies, Inc. (MTI), then a division of Silicon Graphics, Inc. (SGI).
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Race condition
A race condition or race hazard is the behavior of an electronics, software, or other system where the output is dependent on the sequence or timing of other uncontrollable events.
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Re-order buffer
A re-order buffer (ROB) is used in a Tomasulo algorithm for out-of-order instruction execution.
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Register file
A register file is an array of processor registers in a central processing unit (CPU).
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Register renaming
In computer architecture, register renaming is a technique that eliminates the false data dependencies arising from the reuse of architectural registers by successive instructions that do not have any real data dependencies between them.
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Replay system
The replay system is a little-known subsystem within the Intel Pentium 4 processor.
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Reservation station
Unified Reservation station, also known as unified scheduler, is a decentralized feature of the microarchitecture of a CPU that allows for register renaming, and is used by the Tomasulo algorithm for dynamic instruction scheduling.
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Sandy Bridge
Sandy Bridge is the codename for the microarchitecture used in the "second generation" of the Intel Core processors (Core i7, i5, i3) - the Sandy Bridge microarchitecture is the successor to Nehalem microarchitecture.
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Scoreboarding
Scoreboarding is a centralized method, used in the CDC 6600 computer, for dynamically scheduling a pipeline so that the instructions can execute out of order when there are no conflicts and the hardware is available.
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Shelving buffer
A shelving buffer is a technique used in computer processors to increase the efficiency of superscalar processors.
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Spectre (security vulnerability)
Spectre is a vulnerability that affects modern microprocessors that perform branch prediction.
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Speculative execution
Speculative execution is an optimization technique where a computer system performs some task that may not be needed.
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Sun Microsystems
Sun Microsystems, Inc. was an American company that sold computers, computer components, software, and information technology services and created the Java programming language, the Solaris operating system, ZFS, the Network File System (NFS), and SPARC.
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Thread (computing)
In computer science, a thread of execution is the smallest sequence of programmed instructions that can be managed independently by a scheduler, which is typically a part of the operating system.
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Tomasulo algorithm
Tomasulo’s algorithm is a computer architecture hardware algorithm for dynamic scheduling of instructions that allows out-of-order execution and enables more efficient use of multiple execution units.
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Transmeta Crusoe
The Crusoe is a family of x86-compatible microprocessors developed by Transmeta and introduced in 2000.
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UltraSPARC
The UltraSPARC is a microprocessor developed by Sun Microsystems and fabricated by Texas Instruments, introduced in mid-1995.
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Very long instruction word
Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP).
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Yale Patt
Yale Nance Patt is an American professor of electrical and computer engineering at The University of Texas at Austin.
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Redirects here:
Decoupled Architecture, Decoupled architecture, Dynamic execution, In-order processor, OOE, OOOE, OoOE, Oooe, Out of Order execution, Out of order execution, Out-of-order code execution.
References
[1] https://en.wikipedia.org/wiki/Out-of-order_execution
